The present disclosure relates to a memory device, and more particularly, to a memory device and a memory system having a repair unit modification function.
Semiconductor chips are manufactured through semiconductor manufacturing processes, and then tested by a test device in a wafer, a die, or a package state. Defective portions or defective chips are selected through a test, and if some of memory cells are defective, repairs are performed to save semiconductor chips. Currently, semiconductor chips such as dynamic random access memories (DRAMs) have been continued to be reduced in size through fine processes, and accordingly, possibility of occurring errors during manufacturing processes have increased. Also, if defects are not detected through an initial test process, errors may occur during chip operations. To address the above problems, various test methods and apparatuses have been developed.